Circuit schematics

The circuit package draws electronic schematics over the vector-graphics layer: passive parts, sources and meters, diodes, transistors, the op-amp and integrated circuits, joined by wires. The logic package adds logic gates on top of it, so digital and analogue parts share one drawing.

\use{circuit}

A schematic is drawn inside a \picture, and the whole of it is a single box that flows in the text.

\picture width:2.6in height:1.7in {
  \battery{(30,25)}{(30,105)}{9 V}
  \resistor{(30,105)}{(160,105)}{$R_1$ 470 Ω}
  \led{(160,105)}{(160,25)}{$D_1$}
  \wire{(160,25)}{(30,25)}
  \ground{(30,25)}
}

Parts between points

A two-terminal part is drawn between two points. Its symbol sits centred on the line from the first point to the second, and lead wires stretch from each end of the symbol to the points, so a part is also a piece of wire and a loop of parts closes on itself. A part runs in any direction, diagonals included, and its symbol turns with the line. If the points are closer together than the symbol is long, the symbol shrinks to fit.

\resistor [side] {a} {b} {label}

The points are ordinary picture coordinates: points by default, with units welcome — (1in, 2cm) — and any named coordinate, (A) or a pin such as (U1.out).

Direction carries polarity, by one rule for every part that has one: positive current flows through the part from the first point to the second. So a diode’s anode is the first point and its cathode the second; a polarised capacitor’s positive plate is the first point; a battery’s or voltage source’s positive terminal is the second (current leaves a source at its positive end); and a current source’s arrow points from the first point to the second.

Labels

The label is set beside the middle of the part, clear of its symbol: above a part that runs more across than up, to the right of one that runs more up than across — whichever way along the line it was drawn. The optional [side] moves it: [above], [below], [left] or [right].

\resistor[below]{(0,0)}{(90,0)}{1 kΩ}

An empty label, {}, sets nothing. A label is ordinary text, so math works: {$R_1$}.

The parts

All take [side] {a} {b} {label} except \potentiometer, whose third point is where its wiper’s wire goes; its label goes on the other side of the body unless [side] says otherwise.

Wires and connections

Parts with pins

A part with more than two terminals is placed at a point under a name, and publishes its pins as named coordinates — (Q1.B), (U1.out) — which wires and other parts then connect to.

\picture width:2.2in height:1.6in {
  \supply{(120,100)}{+12 V}
  \lamp{(120,100)}{(120,70)}{}
  \npn{Q1}{(114,50)}{$Q_1$}
  \wire{(120,70)}{(Q1.C)}
  \resistor{(30,50)}{(Q1.B)}{10 kΩ}
  \ground{(Q1.E)}
}

A transistor’s base or gate is on the left; [mirror] puts it on the right. The op-amp has its inverting input on top; [plus] puts the non-inverting one there. An \ic is a box with the pins listed down its left side and down its right, each named inside the box, as wide as the names need:

\ic{U1}{(2in,1in)}{NE555}{DISCH THRES TRIG GND}{VCC RESET OUT CTRL}

publishes (U1.DISCH) through (U1.CTRL). A pin name may not contain a space.

A pin is published globally, so it can be used anywhere later in the picture. Naming a pin that does not exist is an error that names it: unknown coordinate 'Q1.X'.

ANSI or IEC

Symbols follow ANSI/IEEE 315 by default. One setting switches to IEC 60617, which changes the resistor (and the parts built on it), the polarised capacitor and the sources, and turns the logic gates into rectangles:

\set ckstyle {iec}

Like any \set, it respects grouping, so one figure can differ from the rest.

Configuration

Set these with \set after the \use. Sizes are in points unless they carry a unit.

Logic gates

\use{logic}

loads circuit as well, so gates, wires and every circuit part share one picture. A gate is placed at a point under a name, facing right, and publishes its inputs (name.in1), (name.in2), … from the top down and its output (name.out). A one-input gate also calls its input (name.in).

\picture width:3.4in height:1.4in {
  \xorgate{X}{(140,75)}
  \andgate{N}{(140,25)}
  \terminal{(30,80)}{$A$}
  \terminal{(30,60)}{$B$}
  \wire{(30,80)}{(X.in1)}
  \wires{(30,60) (80,60) (80,70) (X.in2)}
  \wirevh{(60,80)}{(N.in1)}
  \junction{(60,80)}
  \wirevh{(80,60)}{(N.in2)}
  \junction{(80,60)}
  \wire{(X.out)}{(200,75)}
  \terminal[right]{(200,75)}{$S$}
  \wire{(N.out)}{(200,25)}
  \terminal[right]{(200,25)}{$C$}
}

[inputs] is the number of inputs, two by default; the body grows so they keep their spacing. ANSI/IEEE 91 distinctive shapes are the default; \set ckstyle {iec} draws the IEC rectangles marked &, ≥1, =1 and 1, with the negation bubble kept. The gate geometry is set by lgwidth (30), lgpitch (10), lglead (8) and lgbubble (2.5).

The packages are packages/circuit.texish and packages/logic.texish; the bundled scripts/circuit-demo.script and scripts/logic-demo.script draw every part and gate in both standards, with complete circuits.